Camera Link Frame Grabber Board REV 52 PCIDV-CLINK AD04486 Part #: 019-01508

• Brand: Engineering Design Team
• Part #: 019-01508,015-12381-00
• Alt. Part Identifiers: PCIDV-CLINK,AD04486
• Specs:-
•   ::  Type: Camera Link Frame Grabber Board
• Condition: New
• Warranty: 1 (one) year Tekmart Africa warranty
•  

Key points to note on these PCIDV-CLINK Engineering Design Team Camera Link Frame Grabber cards:-

The PCI DV C-Link is a Camera Link frame grabber board that provides high-resolution image capture for digital video cameras. The PCI DV C-Link has two MDR 26-pin connectors to support one medium- or up to two base-mode cameras. It supports standard mode control (CC) lines and has an on-board UART for camera control and external triggering.

The compact, half-length board fits in any PCI bus. Images are captured and displayed in real time, and camera speed, resolution, and number of buffers are limited only by host bandwidth and memory.

System must have a PCI or PCI-X bus, 66 MHz or faster (33 MHz will work, but at reduced data rates.

PCI (& PCI-X) provides far less bandwidth than PCI Express; nevertheless it is still sufficient for a large class of devices. EDT PCI boards are capable of streaming data to host memory at device speeds of up to ~100MB/sec (33Mhz boards), or 200+ MB/sec (66 MHz boards in a 66Mhz or faster PCI slot).

These EDT DMA boards are high-performance, high-speed direct memory access (DMA) devices, and the devices they connect to range from low to very high speed/high bandwidth. As such, they can demand a little or a lot from the host computer in terms of memory speed, display performance, and bus bandwidth.

Due to the wide range of devices and applications, required bus performance can vary greatly. In many cases, a modern Intel- or AMD-based computer that meets the basic system requirements will be more than adequate. But frequently, the device being connected to and the demands of the application dictate a system that’s tuned to the task at hand.

PCI Express bus considerations

PCI Express was designed to replace the older PCI / PCI-X specification, which had less speed and bandwidth. The following list represents peak bandwidth guidelines for EDT’s PCI Express boards:

• ::  Gen.1 PCIe 8-lane ~ 1.3GB/s
• ::  Gen.2 PCIe 8-lane ~ 2.6GB/s
• ::  Gen.3 PCIe 8-lane ~ 4.0GB/s

EDT PCIe boards will typically fit in any slot with the same or a higher number of lanes than the board has. For example a 1-lane (x1) EDT board will also work in an x4, x8 or x16 slot, and an x4 board will also work in an x8 or x16 slot.

Note that PCIe slots can have different electrical and physical designations — for example there are 8-lane physical / 4-lane electrical slots. An 8-lane board will work in such a slot, but the maximum bandwidth (speed) will be reduced by approximately 50%.

The pciediag_tool utility provided with the EDT PDV or PCD installation package, can be used to find out how many PCI Express lanes your board negotiated with the system.

Another limitation that sometimes shows up relates to OS system interrupts. Each buffer (or frame, in the case of a camera) generates an interrupt to tell the software when the buffer is full, and the OS’s interrupt scheduler needs to be able keep up. If it doesn’t, some buffers (frames) may be missed. The achievable interrupt rate is highly dependent on OS as well as other interrupt traffic (mouse movement interrupts for example) but maximum reliable rates for a single EDT board/device are typically in the 1-2KHz range. If your device / application exceeds this rate, there are various workarounds, for example by grabbing two images/frames per buffer in the case of a digital video board, or streaming bytes and setting the board to ignore any gating signals that would cause interrupts, e.g. frame valid / line valid. Look at our example applications that come with the driver / SDK or contact EDT if you need help with this.

INST: 030524004